Physical AI needs compute that lives where the work happens: in machines, on factory floors, inside vehicles and instruments. We design and build that silicon in India, from architecture to tape-out.
A platform for intelligence in the physical world
The IP
Drutam's core IP is an edge-AI accelerator built for intelligence that has to run where the work happens, inside real power and latency budgets. It runs today on datacenter-class FPGAs and is engineered for a clean path to ASIC. What it does, how fast, and on which models is a conversation we would rather have with you directly.
High-performance compute
Built for demanding models at the edge.
FPGA-prototyped
Running today; engineered for tape-out.
General tensor substrate
A programmable core, not a fixed-function block.
Designed in India
Architected, verified, and iterated end-to-end in India.
The methodology
What distinguishes our silicon R&D is how the silicon is built. AI is embedded across the hardware development flow: drafting RTL from specification, generating and triaging verification, exploring synthesis and timing-closure strategies, and iterating physical design.
The research output is twofold: the accelerator IP itself, and the methodology that builds it. Both stay in-house. This system exists to design our own chips, not to be licensed out. Under India's semiconductor mission, our contribution to the ecosystem is capability: chips architected, verified, and iterated end-to-end in India.
The platform
An accelerator is only useful when models actually run on it. We build the software layer that turns the chip into something a team can deploy on, rather than a bare part. The long-term arc is a complete platform for physical AI: silicon, system software, and deployment tooling, designed together.
Continuity
Origins
Deep-learning accelerator research begins at IIT Madras with the ShaktiMAAN project.
Prototyping
Multi-year architecture iteration; the accelerator runs and is validated on datacenter-class FPGAs.
AI in the loop
AI embedded across RTL, verification, and physical-design exploration, in production use on our own silicon.
Ahead
ASIC realisation and a complete platform for physical AI: silicon, system software, and tooling.
Made in India 🇮🇳
Drutam's accelerator IP, design methodology, and system software are architected end-to-end in India. As part of the ecosystem under India's semiconductor mission, we use AI in our own design loop to develop chips in-house, building the country's capability to create its own silicon, edge-AI hardware, and a trained design talent pipeline.
About us
Drutam Technologies is an Indian deep-tech company building the compute platform for physical AI: intelligence that runs in machines, instruments, and the places where work actually happens. We started at IIT Madras with the ShaktiMAAN accelerator project and are incubated at IITM Pravartak Technologies Foundation, with early guidance from Prof. V. Kamakoti.
Today we build for the real world: accelerator IP running on datacenter-class FPGAs, AI working inside a production chip-development flow, and the system software that turns the hardware into something a team can deploy on.
Leadership
Founder & CEO
Hemant architected Drutam's edge-AI accelerator IP and the AI-driven design flow that builds it, and leads the company's silicon and systems research. His work on deep-learning acceleration began with the ShaktiMAAN project at IIT Madras.
Honorary Advisor
A leading figure in Indian computer architecture and the force behind the Shakti processor ecosystem at IIT Madras, Prof. Kamakoti has guided Drutam from its earliest days.
For government programmes, academic collaboration, and strategic partners in edge-AI silicon, we welcome the conversation.
Contact
Whether you are exploring edge-AI silicon for a product, running an institutional or research programme, or looking at where this fits in India's semiconductor push, this is the door. Tell us who you are.